
//[i] color english_UL,
LOAD ModuleLib system\language\english_UL.txt,

//ͨģnrf2401

//汾:	ڰ汾v0й̶4ֽ,汾ĳ9;
//оƬ:	޹ش

//óʱʱ

NRF2401
[
	public link io []
	
	//--------------------------------
	//[i] var address ,
	public [N8*5] address,
	N16 time_out,
	
	//--------------------------------
	//[i] function OS_init ,
	public V OS_init
	port_init,
	spi init,
	set: CONFIG: 0b0000_1111,	//CRCʹܣ16λCRCУ飬ϵ,ģʽ
	set: EN_AA: 0x01,			//ʹܽͨ0ԶӦ
	set: EN_RXADDR: 0x01,		//ʹܽͨ0
	set: SETUP_AW: 0x03,		//õַ 5ֽ
	set: SETUP_RETR: 0xff,		//Զطʱȴ4000us+86usԶط15
	set: RF_CH: 40,			//ѡƵͨ40
	set: RF_SETUP: 0x07,		//ݴ1Mbps书0dBmŴ
	N8 status = ( get: STATUS ),	//״̬Ĵ
	write_command: FLUSH_TX,
	write_command: FLUSH_RX,
	set: STATUS: status | 0b0111_0000,//TX_DSMAX_RTжϱ־
	//óʱʱ
	time_out = 0xffff,
	end.
	//--------------------------------
	//[i] function isOK ,
	public T isOK
	set: RF_CH: 0x03,
	if ( get: RF_CH ) != 0x03,
		return NO.
	set: RF_CH: 0x40,
	if ( get: RF_CH ) != 0x40,
		return NO.
	return YES,
	end.
	//--------------------------------
	//[i] function to_normal_mode ,
	public V to_normal_mode
	N8 c = ( get: CONFIG ),
	c | 0b0000_0010,
	set: CONFIG: c,
	end.
	//--------------------------------
	//[i] function to_power_down_mode ,
	public V to_power_down_mode
	N8 c = ( get: CONFIG ),
	c & 0b1111_1101,
	set: CONFIG: c,
	end.
	//--------------------------------
	//[i] function set_out_time ,
	public V set_out_time: N16 time
	time_out = time,
	end.
	//--------------------------------
	//[i] function set_receive_mode ,
	public V set_receive_mode
	io CE_OUT = LOW,
	//дַͨ
	write_buffer: WRITE_REG + RX_ADDR_P0: address: 5,
	N8 c = ( get: CONFIG ),
	c | 0b0000_0001,
	set: CONFIG: c,
	io CE_OUT = HIGH,
	end.
	//--------------------------------
	//[i] function set_send_mode ,
	public V set_send_mode
	io CE_OUT = LOW,
	N8 c = ( get: CONFIG ),
	c & 0b1111_1110,
	set: CONFIG: c,
	io CE_OUT = HIGH,
	end.
	//--------------------------------
	//[i] function send_buffer ,
	public V send_buffer: [N8*?] buffer: N8 length: [N8*?] TX_address
	//ͨ0ѡͷͨͬЧݿ
	set: RX_PW_P0: length,
	io CE_OUT = LOW,
	//дݰTX FIFO
	write_buffer: WR_TX_PLOAD: buffer: length,
	//д뷢͵ַ
	write_buffer: WRITE_REG + TX_ADDR: TX_address: 5,
	//ΪӦ豸ͨ0ַͷ͵ַͬ
	write_buffer: WRITE_REG + RX_ADDR_P0: TX_address: 5,
	io CE_OUT = HIGH,
	
	//ȴӦ
	repeat until io IRQ_IN == LOW, ...
	N8 status = ( get: STATUS ),	//״̬Ĵ
	set: STATUS: status,  	//TX_DSMAX_RTжϱ־
	write_command: FLUSH_TX,
	end.
	
	//--------------------------------
	//[i] function receive_buffer ,
	public T receive_buffer: [N8*?]buffer: N8 length: T is_time_out
	//ͨ0ѡͷͨͬЧݿ
	set: RX_PW_P0: length,
	N16 n = 0,
	repeat until io IRQ_IN == LOW,
		if is_time_out,
			n + 1,
			if n == time_out, return NO.
		OK.
		...
	N8 sta = ( get: STATUS ),
	set: STATUS: sta,
	read_buffer: RD_RX_PLOAD: buffer: length,
	return YES,
	end.
	//--------------------------------
	//p_bufед뵽nRF24L01ͨд뷢ͨݻ/͵ַ
	V write_buffer: N8 reg: [N8*?] p_buf: N8 length
	io CSN_OUT = LOW,
	spi write_byte: reg,
	repeat start N8 i = 0, each i + 1, until i == length,
		spi write_byte: p_buf i,
		...
	io CSN_OUT = HIGH,
	end.
	//--------------------------------
	V write_command: N8 cmd
	io CSN_OUT = LOW,
	spi write_byte: cmd,
	io CSN_OUT = HIGH,
	end.
	//--------------------------------
	//ȡnRF2401ĳ
	V read_buffer: N8 reg: [N8*?]p_buf: N8 length
	io CSN_OUT = LOW,
	spi write_byte: reg,
	repeat start N8 i = 0, each i + 1, until i == length,
		p_buf i = spi read_byte,
		...
	io CSN_OUT = HIGH,
	end.
	//--------------------------------
	//дĴ
	V set: N8 addr: N8 data
	io CSN_OUT = LOW,
	spi write_byte: WRITE_REG + addr,
	spi write_byte: data,
	io CSN_OUT = HIGH,
	end.
	//--------------------------------
	//Ĵ
	N8 get: N8 addr
	io CSN_OUT = LOW,
	spi write_byte: READ_REG + addr,
	N8 data = spi read_byte,
	io CSN_OUT = HIGH,
	return data,
	end.
	//--------------------------------
	N8 CONFIG = 	A NUM 0x00,  //'Config'
	N8 EN_AA = 		A NUM 0x01,  //'Enable Auto Acknowledgment'
	N8 EN_RXADDR = 	A NUM 0x02,  //'Enabled RX addresses'
	N8 SETUP_AW = 	A NUM 0x03,  //'Setup address width'
	N8 SETUP_RETR = 	A NUM 0x04,  //'Setup Auto. Retrans'
	N8 RF_CH = 		A NUM 0x05,  //'RF channel'
	N8 RF_SETUP = 	A NUM 0x06,  //'RF setup'
	N8 STATUS = 	A NUM 0x07,  //'Status'
	N8 OBSERVE_TX = 	A NUM 0x08,  //'Observe TX'
	N8 CD = 		A NUM 0x09,  //'Carrier Detect'
	N8 RX_ADDR_P0 = 	A NUM 0x0A,  //Ƶ0ݵַ
	N8 RX_ADDR_P1 = 	A NUM 0x0B,  //'RX address pipe1'
	N8 RX_ADDR_P2 = 	A NUM 0x0C,  //'RX address pipe2'
	N8 RX_ADDR_P3 = 	A NUM 0x0D,  //'RX address pipe3'
	N8 RX_ADDR_P4 = 	A NUM 0x0E,  //'RX address pipe4'
	N8 RX_ADDR_P5 = 	A NUM 0x0F,  //'RX address pipe5'
	N8 TX_ADDR = 	A NUM 0x10,  //'TX address'
	N8 RX_PW_P0 = 	A NUM 0x11,  //Ƶ0ݳ
	N8 RX_PW_P1 = 	A NUM 0x12,  //'RX payload width, pipe1'
	N8 RX_PW_P2 = 	A NUM 0x13,  //'RX payload width, pipe2'
	N8 RX_PW_P3 = 	A NUM 0x14,  //'RX payload width, pipe3'
	N8 RX_PW_P4 = 	A NUM 0x15,  //'RX payload width, pipe4'
	N8 RX_PW_P5 = 	A NUM 0x16,  //'RX payload width, pipe5'
	N8 FIFO_STATUS = 	A NUM 0x17,  //'FIFO Status Register'
	//SPI nRF24L01 commands
	N8 READ_REG =	A NUM 0x00,  //Define read command to register
	N8 WRITE_REG =	A NUM 0x20,  //Define write command to register
	N8 RD_RX_PLOAD =	A NUM 0x61,  //Define RX payload register address
	N8 WR_TX_PLOAD =	A NUM 0xA0,  //Define TX payload register address
	N8 FLUSH_TX =	A NUM 0xE1,  //Define flush TX register command
	N8 FLUSH_RX =	A NUM 0xE2,  //Define flush RX register command
	N8 REUSE_TX_PL =	A NUM 0xE3,  //Define reuse TX payload register command
	N8 NOP =		A NUM 0xFF,  //Define No Operation, might be used to read status register
	
	//SPIнӿԪ,λǰ,λں
	spi SCK_DIR -> io SCK_DIR, spi SCK_IN -> io SCK_IN, spi SCK_OUT -> io SCK_OUT,
	spi MISO_DIR -> io MISO_DIR, spi MISO_IN -> io MISO_IN, spi MISO_OUT -> io MISO_OUT,
	spi MOSI_DIR -> io MOSI_DIR, spi MOSI_IN -> io MOSI_IN, spi MOSI_OUT -> io MOSI_OUT,
	LOAD CurrentDir [BOARD].txt,
]













